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Limitations of the PlayStation 3 for High Performance Cluster ...

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at evaluating the performance and the limitations of the PS3 platform for high ..... Communication path for the SUMMA algorithm on a 2x2 PS3 nodes ...

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Limitations of the PlayStation 3 for High Performance Cluster ComputingPage 1Limitations of the PlayStation 3 for HighPerformance Cluster ComputingAlfredo Buttari1 Jack Dongarra12 Jakub Kurzak11Department of Computer Science University Tennessee Knoxville Tennessee 379962Computer Science and Mathematics Division Oak Ridge National Laboratory OakRidge Tennessee 378311 IntroductionPower consumption heat dissipation and other physical limitations are pushing the microprocessor industry towards multicore design patterns. Most of theprocessor manufacturers such as Intel and AMD are following more conventional approaches which consist of homogeneous symmetric multicores whereexecution units are replicated on the same dime; multiple execution units sharesome cache level (generally L2 and L3) and the bus to memory. Other manufacturers proposed still homogeneous approaches but with a stronger emphasis onparallelism and hyperthreading. This is for example the case of Sun with theUltraSPARC T1 (known as Niagara). The UltraSPARC T1 2524] can haveup to eight homogeneous cores each of which is fourway hyperthreaded whichdelivers a maximum parallelism degree of thirtytwo. The Niagara processor ismostly developed for web servers and database applications since it provideshigh computational power for integer operations which are used considerably inpointer arithmetics and string processing. Yet other chip manufacturers startedexploring heterogeneous designs where cores have different architectural features.One such example is the Cell Broadband Engine 22171918] developed by STIa consortium formed by Sony Toshiba and IBM. The Cell BE has outstandingfloatingpoint computational power which makes it a considerable candidate forhigh performance computing systems. IBM shipped the first Cellbased systemthe BladeCenter QS20 on September 12th 2006. This blade is equipped withtwo Cell processors with a 512 MB memory each and connected in a NUMAconfiguration; the external connectivity is achie ...

Source: www.netlib.org

 

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